Units

Verification and formal methods

Person in charge of the Unit : Oui

The research and teaching activities of the ''formal methods and verification group'' deal with rigourous methods that allow to design reliable computer systems. These methods are usually applied in the context of critical systems, such as embedded systems in transportation (trains, planes, cars), plants control systems, and so forth.

Projetcs

MOVES: Fundamental Issues in Modelling, Verification and Evolution of Software

See http://moves.vub.ac.be/

Correct, efficient and robust controllers

The elaboration of a framework for the development of distributed industrial supervisors and controllers leads to interesting problems, in particular to tools for the automatic distribution of codes and validation modules to improve their robustness.