Inventaire
Site en anglais
DRICOT Jean-Michel



Unités


Groupe de communications sans fil

Le groupe de communications sans fil a été créé en 2007. Sa vision stratégique est centrée sur le développement d’une équipe de recherche travaillant en synergie aux nouveaux défis posés par la conception des systèmes de télécommunications sans fil émergents, allant de la physique de la propagation des ondes jusqu’aux architectures réseau, en passant par le modem.

Le groupe possède de l’expertise dans trois domaines complémentaires : (i) la caractérisation et la modélisation du canal de propagation des ondes (Prof. Philippe De Doncker) ; (ii) le traitement de signal pour communications numériques (Prof. François Horlin) ; (iii) la cybersécurité et les architectures et protocoles réseaux (Prof. Jean-Michel Dricot).

La mission de l’équipe canal est la caractérisation théorique et expérimentale, puis la modélisation des phénomènes de propagation pour les systèmes de communications émergents. L’expérience acquise comprend la propagation en milieu indoor, urbain, et dans le champ proche du corps humain, pour des fréquences allant de l’HF aux ondes millimétriques.

La mission de l’équipe traitement de signal est développer des solutions pour systèmes de communications numériques émergents, en prenant particulièrement en compte les contraintes liées à l’implémentation hardware et l’intégration système. L’équipe étudie les techniques de modulation et d’accès au canal, d’égalisation de canal et de synchronisation des terminaux communicants.

L’équipe réseau porte son attention sur la définition d’architectures logicielles pour les réseaux sans-fils ainsi que l’implémentation de protocoles de sécurité. Le domaine de recherche couvre les réseaux sans-fil, l’internet des objets et, par extension, les systèmes cyber-physiques. L’équipe réseau fait également partie du Centre de recherches en Cybersécurité de l’ULB.

Centre de recherche en cybersécurité

Responsable d'Unité : Oui

Founded in 2017, the multidisciplinary research center in cybersecurity aims at federating the research labs active in the field of cybersecurity. It builds on top of a long-standing and well established research experience of its research groups.

The Cybersecurity Research Center has strong ties with the Master of Science in Cybersecurity, the Center for Cyber Security Belgium (CCB), and the Cybersecurity Coalition.

Projets


Smart Payment Engine

One of the problems with the transparency, a property usually provided by current blockchain techniques, is privacy since everyone can look at the data inserted in the transactions compiled in the different block of a blockchain. In this way, the trust obtained on the basis of the content of the transactions comes at the price of lack of privacy. From a commercial perspective, if it may be needed to avoid sharing publicly the amounts and contents of transactions, however the payment history may be of interest for credits for example or to prove that deliveries were realized successfully. Two main techniques are used to improve the privacy of blockchains: zero-knowledge protocols and homomorphic Encryption.

Another research topic related to the subject of this proposed project is the design of fair exchange protocols. These cryptographic protocols make it possible to implement, in a fair way, an exchange of goods via a network (a good against a payment, a payment against the commitment to send a physical good...) while guaranteeing that either the different participants in the protocols receive what they expect, or no participant receives anything that can be valuable (this property is called "fairness"). In the framework of this project we envisage to study how such protocols can be improved on the basis of a blockchain technology.

Also, blockchain technologies currently suffer from a range of limitations. For instance, Bitcoin, the main blockchain used for payment today, is radically impractical for the type of use cases targeted by the SPE because each Bitcoin transaction can take upto several minutes to get accepted and validated. This delay is impractical in a shop where the merchant could have to wait a long time to be sure it is paid. Besides, the Bitcoin blockchain can accept only 3 transactions per second. Some blockchains try to address Bitcoin’s limitations and currently promise to handle 15 000 to 20 000 transactions per second at the price of a lighter transaction verification procedure. In the frame of this research project, we aim at working on an enhancement of blockchain technologies to reach performance levels that are close to the load and transaction rate that centralized payment platforms can handle: A SPE transaction should be validated in less than a second, and the blockchain sustaining the SPE should be able to process 30 000 transactions per second.

SOFIST

Over the last 50 years the CMOS scaling has allowed manufacturing of Integrated Circuits (ICs) with predictable increase in efficiency. The major barrier that CMOS technology is facing today are the physical limits of sub-10nm processes, which are preventing further cost-effective down-scaling of ICs. The only alternative to still continue to increase the IC performance (i.e. cost-effective enablement of advanced IC processes) is to dramatically increase the number ICs deployed, with identical layout.

Conversely, the rise of new computing paradigms such as Internet-of-Things (IoT) and Internet-of- Everything (IoE) (billions of devices foreseen in 2020) requires extremely versatile IC solutions. To support this wide variety of applications, including the existing mobile and high-performance comput- ing, extremely configurable systems – both at design-time and run-time – will be required.

The SOFIST project aims at designing highly scalable, low-cost, template System-on-Chip (SoC) archi- tectures for CLOUD-OF-CHIPS applications. CLOUD-OF-CHIPS refers to large amounts of interconnected ICs and IC cores (which may or may not be on the same board), which can have different communi- cation speeds and hierarchy levels. The proposed architecture is configurable: 1) at design-time (core template architecture, size of tightly coupled computing clusters, etc.), and 2) at run-time (depending on the application: IC communication scheme, security features, size of computing clusters, etc.).